I shortly thought about possibility of custom PAL/NTSC decoding at some point, and while theoretically possible, I concluded that it would require a bit too much effort with end result likely not looking very good (even for composite). I think the largest issue is the lack of exact subcarrier clock. The only fixed clock on the board is 27MHz, and I’m not sure if you can get very close to 3.57MHz (NTSC) or 4.43MHz (PAL) frequency or their multiples using Cyclone IV PLLs. Even if you were able to sync to color burst (should be possible), phase error towards end of a scanline would get severe unless you had good enough frequency reference. With some systems it might be possible to derive subcarrier frequency from line period, but that’d lock you into a specific sample rate.
DSP part of the implementation (QAM demodulation) would include implementation of mixers(multipliers) and various filters (low-pass, bandpass, comb) which should be possible with the FPGA’s resources even though analog implementation would sound more natural (for me at least).