The comment about pixel repetition was general, not just for this case. So if IT6613 somehow was able process and output 340MHz pixel clock while FPGA logic pipeline (incl. line buffers) is limited to around 170MHz, one would still able to utilize higher resolution output by duplicating pixel clock (horizontal number of pixels) by enabling pixel repetition on IT6613. That naturally means every other pixel is duplicate, but it could still help with setting correct aspect ratios on higher resolutions. The default presets except the new 1600×400 result into pixel clock below 170MHz.
“Upsample2x” and “Allow TVP HPLL2x” options control how sampling is done internally, and they are applicable only to certain modes. The former never samples higher than what output total is, so it’s not enabled for 1600×400 or similar presets which already have high samplerate to match line3x or higher vertical multiplication. Upsample2x is mainly meant for presets like 480p or 640×400 which are used in line2x in addition to passthru. It just enables user select how horizontal 2x multiplication is done – either 2x sampling on TVP7002 or pixel repetition on IT6613 (which is more straightforward than adding extra 2x multiplication on FPGA).
Allow TVP HPLL2x option on the other hand sets TVP7002 sample at 2x rate internally, but its output is divided by 2 so the timing seen by FPGA is identical regardless of the option. The reason for using this option is that TVP7002 is not very good at low sampling clocks (increased jitter), so the option is enabled for low-res presets which don’t have high samplerate (e.g. basic 240p preset). The downside of the option is that phase is not consistent with it (random 180deg shift) due to bad implementation in TVP7002, so it’s disabled for all optimal modes.