Reply To: OSSC Pro: Failed Firmware Update

#64014
marqs
Participant

    @JAMIEvx Tried importing the linked profile+settings pair as default but could not replicate the lockup. I regenerated bitstream with different seed which slightly changes timings within FPGA (.jic here). During development I’ve occasionally managed to generate a bitstream that similarly does not boot, but so far I’ve thought that it’d due to a tool bug and would behave identically on every board.