Reply To: OSSC Pro firmware v0.80

[marqs]

I managed to reproduce the freezing issue, and it seems that it is caused by IO timing changes. There are no functional changes for FPGA bitstream between 0.79 and 0.80 aside added USB timing constraints. However, any change on RTL / constraints makes the implementation tool do full placement & routing, potentially resulting to completely different IO timing. It should still be within defined functional range as no related violations were reported, but it wouldn’t be the first time calculated IO timings differ from reality.

I also noticed some issues on the SD card drivers (e.g. data transfer watchdog was not set), but fixing these did not resolve the issue. Unfortunately debugging such timing issues is quite challenging due to the random nature of placement & routing engine.