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	<title>VideoGamePerfection.com | akvankka | Mentions</title>
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				<title>marqs replied to the topic OSSC v1.xx series beta firmware in the forum OSSC - Discussion and support</title>
				<link>https://videogameperfection.com/forums/topic/ossc-v1-xx-series-beta-firmware/page/22/#post-63422</link>
				<pubDate>Sun, 22 Sep 2024 16:06:34 +0100</pubDate>

									<content:encoded><![CDATA[<p><a href='https://videogameperfection.com/members/akvankka/' rel="nofollow ugc">@akvankka</a>: some boards seem to have timing issues with high-frequency clock on certain firmware versions that gets reported every now and then. According to the FPGA design tool IO timing should be fully clean, though. Any trivial RTL modification also completely changes timing so it&#8217;s hard to debug. I can check if any of my boards have this issue&hellip;<span class="activity-read-more" id="activity-read-more-9094"><a href="https://videogameperfection.com/forums/topic/ossc-v1-xx-series-beta-firmware/page/22/#post-63422" rel="nofollow ugc">Read more</a></span></p>
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