The parameters are primarily calculated from digitizer chip registers, which tell the number of 27MHz clocks per line (longest one in case they are uneven length for some reason) and lines per frame. However, they are not always the most accurate as former has some variation and latter may be off by one in some rare cases. A more accurate measurements could be done by FPGA itself (although it uses the same oscillator as fixed external clock) by counting clocks per frame which would really be required if additional digits were shown on the displayed numbers.
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