Reply To: OSSC and PS2 intermittent black screen

[marqs]

A test firmware is available here. It has 2 new settings under sync options: ADC PLL BW and FPGA PLL BW. One can try setting ADC PLL BW to low which should have similar result than 1.09. FPGA PLL BW can be set alternatively/additionally to low but that has effect only on line3x or above (you know when there is a short blackout during switching the setting).