I’m using ADC PLL BW set to Medium (setting to High gives me a blank screen) Also have FPGA PLL BW set to Low (again, High gives me a blank screen). The screen jitter at the top definely is a lot less noticeable than when using previous FW versions. Also, setting the Video In Video LFP to Off reduces the jitter even more without affecting the rest of the image.
The above is when outputting to a VGA CRT monitor via a DAC (an HP 7540 to be precise) I also get the jitter when using my HDMI TV, however it is more forgiving and allows the ADC and FPGA settings to both be set to high. Also, if I want to hide it, I can do so by setting the output to 5x which crops off the top of the image anyways (adding a vertical mask of 2 on top of that is enough to completly hide the jitter)