OSSC and PS2 intermittent black screen

[marqs]

You should not use 0.xx firmwares on v1.8 board. You can instead try the v1.10 image which was just released.

[paulrobinbrown]

So far, so good for me 🙂

Thank you marqs !

[Tom van den Berk]

I will try the new firmware and report back. Thanks for the warning.

[Tom van den Berk]

I updated the firmware to 1.10 and it is much worse now. The screen turns black every few seconds. The green light stays on. It seems to still work fine on my other tv.

[BuckoA51]

Do you have the latest firmware for your TV?

[Tom van den Berk]

Yes, the tv is fully updated.

[marqs]

I can only think of 2 explanations:
* the board is somehow faulty and does not produce robust HDMI signal (e.g. one line of a TMDS pair broken).
* the changes in 1.10 to reduce sampling jitter increased PLL bandwidth and moved the jitter to output clock. If a TV is super sensitive to clock stability, then the latest firmware can behave worse with the display. I have an idea how this could be verified and can create a test firmware soon.

[Tom van den Berk]

Thank you very much. When the firmware is done, i can test it. I don’t think the board is faulty because the 0.90 firmware seems to work great. I know you said it shouldn’t be used, but it wasn’t working anyway so i thought i could not make it worse. Maybe this is another clue as to what might be different/wrong in the newer firmware versions. I also tested every 1.0x version and 1.01, 1.02 and 1.03 did not work at all, the system would not sync with the PS2.

• This reply was modified 1 year ago by Tom van den Berk.

[nullifer]

It seems like alot of people are currently having issues with the ps2 post 0.90

Myself included.

[marqs]

A test firmware is available here. It has 2 new settings under sync options: ADC PLL BW and FPGA PLL BW. One can try setting ADC PLL BW to low which should have similar result than 1.09. FPGA PLL BW can be set alternatively/additionally to low but that has effect only on line3x or above (you know when there is a short blackout during switching the setting).

[Tom van den Berk]

I tried the test firmware. With ADC PLL BW on high i get black screens every 2 seconds. When i set it to low the black screens stop and it seems to work. I only tried it for a few minutes, because right now i don’t have more time, but i wanted to share the initial findings. I will report back again after a longer gaming session, but the setting does influence the black screens right away. I also turned it back to high and the black screens would return after a few seconds.

[Tom van den Berk]

The test firmware still has the black screen problem. The image was perfect for around 20 minutes and then it gave a 2 second black screen.

[marqs]

It seems that the TV is indeed very sensitive to clock stability. I have updated the test firmware so that FPGA low BW option is now also effective on Line2x / passthru. With both BWs set to low, you should get as stable clock as the board can make out of PS2’s sync. Let me know if that helps. If so, please also try ADC BW=high and FPGA BW=low combination which should minimize sampling jitter which still providing relatively stable output clock. Are you btw running PS2 with standard 480i/576i output in Line2x generic 4:3 processing mode?

[Tom van den Berk]

Thanks, I will try it as soon as possible. I am running with 480i/576i output in Line2x, just the default. I also went back again to 0.90 and the system seems to work perfectly, no black screens as of yet.

[Tom van den Berk]

I tried the low settings for both, and it gave a blank screen after about 10 minutes. ADC BW high gives a blank screen almost right away. One thing i noticed between 0.90 and this version is that the output is 49.99hz where on the 0.90 it is 50.00hz. I dont know if this has anything to do with it.

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