Output range of Legacy AV In (slightly too low white level)

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  • November 24, 2025 at 1:56 PM #67806
    Zacabeb
    Participant

      The output of signals via the Legacy AV In is slightly darker than it could be because of the way the limited range output is currently handled.

      In the ADV7280, the contrast setting is applied before the brightness setting, so if the white level or peak color clips in the contrast step it can’t be restored. Therefore, it’s not possible to properly extend the range from limited to full by lowering the brightness and then increasing the contrast or gain.

      Because of it, while the default -32 offset to brightness corrects the black level, it’s also limiting peak white even though the Extended Output Control Range bit is enabled.

      While the picture only appears slightly darker than it should be because of this, it might be better to do the expansion of the range from limited to full onboard the FPGA. The drawbacks would be some mild posterization and that superwhite throughput would need to be handled by the user by lowering luma gain. But it would result in proper contrast.

      November 24, 2025 at 8:49 PM #67811
      marqs
      Participant

        It seems Extended Output Control only selects what the chip is allowed to output, but the ADC is still designed to produce limited range. With Extended Output Control set to off, a follow-up digital compression is done (also affecting test patterns) to enforce limited range output, resulting to even more compressed range. The register defaults (Extended Output=1, Brightness=0x00, Contrast=0x80) are presumably designed for standard ITU-R BT.656 limited range output and due to the limitations stated above it doesn’t seem to be possible to output full range from ADV7280.

        November 24, 2025 at 9:55 PM #67812
        Zacabeb
        Participant

          Yeah, the Extended Output Range register is apparently just a legalizer control switch. 🙂

          Would it be possible to add a conversion step from limited to full range in the CSC onboard the FPGA to bring the video levels home?

          November 26, 2025 at 8:50 PM #67844
          marqs
          Participant

            It should be possible. I’ll look into that before releasing next fw.

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