SNSP-CPU-02 SNES + SuperCIC + RGB Bypass — CSYNC and installation advice
- This topic has 2 replies, 2 voices, and was last updated July 2, 2024 at 8:28 AM by
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Looking for some advice pre-purchase on Borti’s RGB bypass to be installed into a PAL SNSP-CPU-02 SNES, alongside an existing install of Borti’s SuperCIC AIO mod.
Firstly, there seems to be conflicting instructions between VGP and the GitHub repo on how to install in this revision of SNES. The former seems to remove the caps to the AV out pins, severing the connection, where as the GitHub repo removes transistors whilst replacing resistors at the same time (this isn’t mentioned on VGP). Not sure what the difference between the two is for, but any help there would be appreciated. It does seem that those original instructions were for an earlier revision of the board (circa 2016) so may no longer be required, and just lifting the RGB & CSYNC caps is enough?
Secondly, the AIO board already features a buffered CSYNC output, but not sure if this can be passed into the bypass board on the “CS” pad. If it can, does the buffered CSYNC jumper (J3) need to be open or closed?
For reference, I’ve already gone ahead and physically cut the trace from pin 3 to C46, which is where the buffered CSYNC out from the AIO board is currently soldered to.
Again, any help would be appreciated if any one has a similar install and advice to offer.
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