adami

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  • in reply to: Troubleshooting FPGA after build. #62916
    adami
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      I got this to work, and maybe it will be useful for someone. If all the clk and power signals are fine and it is possible to flash image using JTAG connector but FPGA show no signs of activity then check if R18 (CONF_DONE) is properly connected. In my case that was the source of the problem, once I’ve fixed it OSSC started to work.

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