You need to calculate resulting pixel clock to understand if a mode is realistic for a given HW. For original ossc, the calculation can be roughly made as follows: (H_active_out/0.82)*V_total_in*Linemult*V_Hz. That would result to following pixel clocks for 240p and 288p multiplied into 1920×1440 resolution:
240pX6: (1920/0.82)*262*6*60 = 221MHz
288pX5: (1920/0.82)*312*5*50 = 183MHz
The HDMI chip in original ossc is specced up to 162MHz input clock but likely works at 183MHz if not operated in extreme conditions. 221MHz is too much for the chip and FPGA output to work reliably, but there are ways around it as pixel repetition could be used. The biggest issue perhaps is resulting 1920×1440 timings which are not close to CVT standards, thus having limited monitor compatibility. Anyway, it should be possible to add these options to v1.xx series firmware at some point.
OSSC Pro has neither of these limitations since it has more capable HW which is also able to decouple input and output timings. 2560×1440@60 (CVT_RB) can be thus output without any specific tricks.