[STILL AT IT] Think I fried it. Heard a sizzle.
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- This topic has 37 replies, 5 voices, and was last updated December 23, 2018 at 9:28 PM by
mikklejickles.
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November 24, 2018 at 7:18 PM #23927
mikklejickles
ParticipantAlso i checked u15,u16,u6 voltages and the hsync, vsync continuity etc going from fpga to the ite chip.
The led0 pin is still dead I wonder is the FPGA bad somehow.
November 24, 2018 at 7:40 PM #23928Morpheus_79
ParticipantOther than that it seems to work, is there any scenario under which my tv’s are not supported?
Even though those TVs may not support every exotic resolution/refresh rate combination, they should (at least) support the grey test pattern the OSSC should(!) output without any source connected (since it’s outputted in standard 480p/60Hz).
Also quick q on the tvs diodes – how essential are they and could bad connections there be the problem? In reading up the diodes are for esd protection of the chip only.
Afaik D6 & D7 are not essential for functionality (since the traces are connected even without the diodes in place). They are a pain in the ass to solder manually… so you may want to leave them out…
November 24, 2018 at 7:59 PM #23929mikklejickles
ParticipantThanks again. I’m assuming I don’t need to press a button to see the pattern? It just displays on power on?
November 24, 2018 at 8:32 PM #23931Morpheus_79
ParticipantNo, you don’t need to press any button. It’s the standard output after turning the OSSC on (without any connected/selected input source).
November 24, 2018 at 8:39 PM #23932mikklejickles
ParticipantCool thanks again dude. I’ll keep on truckin.
November 25, 2018 at 7:24 AM #23933mikklejickles
ParticipantOk so I checked the voltages on each TMDS pair out at the chip pins. This is with the cable plugged in to a tv in order to show a load.
Tx2p 2.69v Tx2m 0.2v Tx1p 2.64v Tx1m 3.19v Tx0p 2.64v Tx0m 3.2v
Tx2m (channel 2 negative) is not showing the correct voltage as far as I can tell. It should be in the 2-3v range according to some datasheets I read about hdmi.
Maybe the it6613 chip is bad?
November 26, 2018 at 12:26 AM #23944mikklejickles
ParticipantOk – I created a loop on “HDMITX_DevLoopProc” which i believe is a diagnostics function. I created a debug build and flashed it to the chip (had to disable the setup_rc() function for it to fit in memory).
Gave me the following output, it definitely detects the display after a connection, i think its down to the sending of a bad voltage on one of the pins of the twisted pairs causing the display to reject the signal. I’m going to replace the IT6613 and see what happens.
HDMITX_DevLoopProc sysstat(REG[0x0E])=4Eh HDMITX_DevLoopProc sysstat(REG[0x0E])=6Eh HPDChange HPD=ON ReadEDID(): ReqCount = 32,bCurrOffset = 0 ReadEDID(): ReqCount = 32,bCurrOffset = 32 ReadEDID(): ReqCount = 32,bCurrOffset = 64 ReadEDID(): ReqCount = 32,bCurrOffset = 96 ReadEDID(): ReqCount = 32,bCurrOffset = 128 ReadEDID(): ReqCount = 32,bCurrOffset = 160 ReadEDID(): ReqCount = 32,bCurrOffset = 192 ReadEDID(): ReqCount = 32,bCurrOffset = 224 Support Color: YUV444 Support Color: YUV422 [00] 02 03 26 71 49 90 01 02 - 03 04 05 06 07 20 26 09 [10] 07 07 11 07 18 83 01 00 - 00 6C 03 0C 00 20 00 00 [20] 21 C0 15 15 1F 1F 01 1D - 80 18 71 1C 16 20 58 2C [30] 25 00 40 84 63 00 00 9E - 01 1D 00 72 51 D0 1E 20 [40] 6E 28 55 00 40 84 63 00 - 00 1E 8C 0A D0 8A 20 E0 [50] 2D 10 10 3E 96 00 B0 84 - 43 00 00 18 8C 0A A0 14 [60] 51 F0 16 00 26 7C 43 00 - B0 84 43 00 00 98 00 00 [70] 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 3F HDMI Sink VIC(Video Identify Code)=16 HDMI Sink VIC(Video Identify Code)=1 HDMI Sink VIC(Video Identify Code)=2 HDMI Sink VIC(Video Identify Code)=3 HDMI Sink VIC(Video Identify Code)=4 HDMI Sink VIC(Video Identify Code)=5 HDMI Sink VIC(Video Identify Code)=6 HDMI Sink VIC(Video Identify Code)=7 HDMI Sink VIC(Video Identify Code)=32 HDMI Display found HDMITX_SetOutput HDMITX_DevLoopProc sysstat(REG[0x0E])=6Eh
November 27, 2018 at 11:46 PM #23979electroarcadia
ParticipantThis is what the signals should look like,
VSYNC
and DE
like the above images.
Reference :
Control a Macintosh Classic CRT with a BeagleBone Black – Part 1
December 2, 2018 at 8:53 PM #24112mikklejickles
ParticipantI’m out of ideas folks. Checked the above signals with a scope and they are similar.
Changed out the HDMI chip – doesn’t seem to make a difference. Exact same problem. I connected a HDMI Tester and everything shows normal with the HDMI signal. (5 orange lights for RX, 3 green lights for data, Red for HPD and Green for CEC). That tester only does basic continuty, but at least it shows the connection is good.
On several TV’s and monitors, “No Signal”, and No test pattern.
I also connected a HDMI to DVI cable to a monitor with DVI-In – “No Signal”, and No test pattern.With a Neo-Geo connected – on AV1 i get
AVI: RGBS 264p 15.73kHz 59.59Hz
I’m giving up.
Here is my debug log in case it helps the next person.
Sync LPF value set to 0x0 Flash size in bytes: 8388608 Sector size: 65536 (256 pages) Page size: 256 RC data read (54 bytes) No userdata found on entry 0 SetInputMode(00,00) Input mode is RGB24 Output mode is RGB24 SetupAFE() Reg[61] = 00 Reg[62] = 18 Reg[63] = 10 Reg[64] = 0C Reg[65] = F0 Reg[66] = 00 Reg[67] = 3F HDMITX_SetAVIInfoFrame: VIC=0, Aspect-Ratio=4:3, ITU709=No, ITC=No, pixelrep=0 SetAVIInfo(): ### DIY VIDEO DIGITIZER / SCANCONVERTER INIT OK ###
On switching inputs
BCODE: 0x01 ### SWITCH MODE TO AV1: RGBS ### THS source set to 1 SOG detected Sync up in 3... totlines: 264 (cur) / 0 (prev), clkcnt: 1716 (cur) / 0 (prev). totlines_tvp: 1, VSM: 0 Horizontal samplerate set to 0 Estimated PCLK_HPLL: 0.000 MHz VCO range: Ultra low CPC: 7 Sync up in 2... Sync up in 1... Sync up in 0... Sync up Lines: 264 p Clocks per line: 1716 : HS 15.734 kHz VS 59.59 Hz Hswidth: 129 Vswidth: 8 Macrovision: 0 Mode 240p selected - hsync width: 129px Horizontal samplerate set to 3432 Estimated PCLK_HPLL: 53.999 MHz VCO range: Low CPC: 1 PCLK_in: 13499772Hz TVP LPF value set to 0x0 THS LPF value set to 0x0 Phase selection: 2/2 (FPGA), 1/32 (TVP) h_border: 0, h_opt_startoffs: 0 HDMITX_SetAVIInfoFrame: VIC=0, Aspect-Ratio=4:3, ITU709=No, ITC=No, pixelrep=0 SetAVIInfo(): SetInputMode(00,00) Input mode is RGB24 Output mode is RGB24 SetupAFE() Reg[61] = 00 Reg[62] = 18 Reg[63] = 10 Reg[64] = 0C Reg[65] = F0 Reg[66] = 00 Reg[67] = 3F HDMITX_SetAVIInfoFrame: VIC=0, Aspect-Ratio=4:3, ITU709=No, ITC=No, pixelrep=0 SetAVIInfo():
December 2, 2018 at 9:35 PM #24114Morpheus_79
ParticipantFollowing your attempts in solving this strange issue i was hoping for the best… but expected no solution in replacing the HDMI chip. There were a lot of solder shorts you’ve found so far – so there could be more. And there’s still this little problem with the green LED not working. which is strange… but could be a hint at some bigger problem you haven’t found (yet).
I’ve built 14 or 15 OSSCs in the past and had my fair share of problems with some of them. But i’m still not skilled enough to help you any further since i’ve never seen such a problem before. However i hope you don’t give up in finding the issue. Now at least (according to the debug) some signal is properly recognized and you can rule out the HDMI transmitter IC as a cause. So there may be something wrong with the FPGA or its connection to the A/D video converter or the HDMI transmitter IC…
December 5, 2018 at 4:23 AM #24170mikklejickles
ParticipantHey Morpheus,
Thanks for the reply. In terms of what ‘should’ be coming out of the LED0 pin, what voltage should that be?
I thought that maybe it was because of a bad solder on the IR transmitter, but I wasn’t sure until I removed it altogether. Still don’t get a green LED.
If I were to try one last time, it would probably be to replace the entire FPGA, but it is strange how all of the firmware code seems to run ok on it, which is why I didn’t start there. I’ve checked for bridges with a multi-meter on all chips, all pins. They’re good. Also checked that all legs were soldered in.
December 5, 2018 at 6:41 PM #24183Morpheus_79
ParticipantAre you sure, you haven’t switched the red and the green led? I’m just asking, because the LED0 pin should go to the red LED (D1)… not the green. The green LED is the one labeled D2 and it’s connected to LED1 via R36. I accidentally switched them myself building an OSSC while thinking, D1 HAS to be the green LED. But: no… it’s the red one.
For me the LED1 pin outputs 3.1V, so i assume it should be in the 3.3V range…
December 7, 2018 at 5:09 AM #24220mikklejickles
ParticipantSorry I was referring to them backwards. So the green led was dead I just checked the pin and it’s now outputting 3.3v, i must have fixed the short, I replaced the led and now I have green and red leds working.
Still no output on HDMI but it’s basically doing what it’s supposed to do from every other perspective. My HDMI tester shows perfect connectivity on Channel 0,1,2 and clock. It’s like no data is going to the HDMI from the FPGA.
I’ll try it out on some other TVs.
December 11, 2018 at 12:20 AM #24313mikklejickles
ParticipantI wonder if it’s the power supply. That’s the one thing I’ve not tried switching. Its rated 1.5A at 5v and should work but you never know.
December 12, 2018 at 9:12 AM #24329mikklejickles
ParticipantNope. Not the power supply. Tried a different one rated 2A.
Weird. From all diagnostics, LEDs, HDMI testers and debug outputs it *should* be working but isnt….
Would love some input from marqs if he had any ideas.
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