Jamie Shaw

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  • July 15, 2024 at 12:06 PM in reply to: SNSP-CPU-02 SNES + SuperCIC + RGB Bypass — CSYNC and installation advice #62451
    Jamie Shaw
    Participant

      Going through a bit of a roundabout here… 😅

      Having posted on the circuit-board.de thread, I was redirected to contact Matt from VGP directly, and in turn, kindly forwarded back to the community here for some further insight.

      I might’ve not been clear in my original post, but the Bypass board that I have purchased is the VGP 4.1b board, hence why I am posting here. But due to the differences between it and Borti’s original design, I have some questions about changing it to be suitable with Borti’s AIO SuperCIC / Dejitter board.

      Looking into this further, it seems that he does provide instructions on how to connect the AIO board to the bypass board for PAL 1-CHIP models and a couple of modifications required on the bypass board, but unfortunately due to the VGP model being a derived design of Borti’s, I’m unsure what, if any resistors are required to support the CSYNC coming from the AIO board.

      For the most part, it seems that the first two resistors connected to the CSYNC input on the bypass board are replaced to better suit the voltage coming out of the AIO board, as well as selection of TTL or 75Ω CSYNC provided to AV Pin 3 — these are R41 and R42 on Borti’s design.  I’m not sure how this translates to the VGP version, if at all, I understand if it’s not a 1:1 derivative.

      Borti’s GitHub defines the output of the “raw” CSYNC pad on the AIO board as follows, but I’m not electrical engineering minded enough to decipher which changes are required.

      /CS.o raw: (output (2x)) Raw output of the CPLD, which has 3.3V high and 0V low level. Connect it to the video encode, which is pin 8 of the S-ENC or pin 7 of the S-RGB (both chips allows 2.0V for input high, so 3.3V high is sufficient.)

      For reference, I have a RetroGamingCable’s 470Ω CSYNC RGB SCART so will be using TTL CSYNC — I’ve already soldered J2 on the board to accomplish this. How this factors into the resistors replacements, again, I’m unsure. It may be that the equivalent of R41 only needs replacing in this regard.

      If all else fails, I’ll just leave the CS pad empty and find an alternate-sync SCART.

      July 2, 2024 at 8:28 AM in reply to: SNSP-CPU-02 SNES + SuperCIC + RGB Bypass — CSYNC and installation advice #62227
      Jamie Shaw
      Participant

        Thanks, I’ll do just that.  Just ended up posting here as VGP sells a version of the board, and was looking for some pre-purchase advice 😅

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