OSSC v1.xx series beta firmware

[Zacabeb]

From what I know, the OSSC Classic doesn’t have any separate RAM but is limited to the memory within the FPGA itself.

[marqs]

marqs, I’ve been wondering about this for a while now: would it be possible to take a regular OSSC 1.8, desolder the RAM, add a similar RAM module but with higher capacity and rework the firmware to accept features such as motion adaptive deinterlacing? even if only at say, 2x

OSSC doesn’t have any RAM chip to begin with, it only uses the limited block RAM available on FPGA. The only larger pin compatible FPGA would be EP4CE22 that has 10 additional 1kB RAM blocks, enabling only 2 extra line buffers (of 2048 pixels each). A larger quality of life improvement would be adding a clock generator on board to enable (ideally with above FPGA upgrade) A-LM functionality of Pro, even though it’d have some limitations. That would require PCB update in addition to FW fork which at this point of lifespan has high barrier.

[marqs]

v1.20 firmware has been now released with its dedicated thread where follow-up discussion also should take place as it’s outside of beta phase.

[kruuth]

Kind of an old thread, but I have a v1.6.  What do I need to do to get this to work with the newer FW?  Follow instructions on page1?

[out_loud]

hello, i have a manuferhi ossc, with a the small  chip is26lp016dble, is it possive to use the latest firmware with the hardware mod?

 

EDIT: just to let you all know that the version that i kave work with this mod….

the chip used to firmware update is IS26LP016DBLE-1807 P1F403L8

• This reply was modified 1 week, 5 days ago by out_loud.
• This reply was modified 1 week, 3 days ago by out_loud.

[marqs]

IS25LP016D is known to work without issues.

[out_loud]

hello, yes you are correct, but mine ia 26….

IS26LP016DBLE-1807

or is the same as the 25?

[marqs]

There’s no information available on such chip. If it’s a clone, then you have to upgrade at your own risk.

[marqs]

There’s a new beta version available here that has a few small features&fixes plus support for JTAG UART commands similar to OSSC Pro. Experimental chip-to-chip timing improvements are also included which should fix Line5x digital noise issues on the occasional boards. “Disable PR2x” option has been added under Compatibility menu for those who want to test Line6x without pixel repetition to e.g. improve shadow mask quality. Feedback on these timing updates is highly appreciated, especially if they cause any issues compared to earlier firmwares.

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